Standards such as EnergyStar require power limits on devices, which can include a semiconductor application-specific integrated circuit (ASIC) that must meet the low power requirements to satisfy EnergyStar standards, as well as general consumer demand.
There are many techniques for reducing power in ASICs, including using a low leakage manufacturing process, incorporating multiple voltage domains for the core logic, and powering down sections of the ASIC that are not in use. The first two techniques give up performance and increase system cost, respectively, while the third technique introduces challenges on how to wake the powered down ASIC based on external events such as a button press or network activity.